In a limitless variety of applications, it is desirable or necessary to convert an analog signal into a digital signal. This will be the case, for example, whenever an analog input is to be processed using digital logic. Consequently, a class of circuits, known as analog-to-digital converters, has been developed to provide the desired signal conversion.
As with many other circuit components, analog-to-digital converters implicate concerns about accuracy, power consumption, physical size, etc. Consequently, there is always value in increasing the accuracy, lowering the power consumption or decreasing the physical size of circuit elements such as analog-to-digital converters.
Historically, engineers have been trained to design circuits in terms of voltage. For example, when performing integrated circuit analysis, designers typically focus on the voltage change at the output of the circuit that occurs as a result of a voltage change that occurs from the input of the circuit. Circuit simulators also follow this approach by constructing matrices of nodes to solve for node voltages. On the test bench, voltage sources are used to operate circuits under test and test equipment is configured to measure voltage.
Over the years, the density of integrated circuits has increased rapidly as component sizes have become smaller. With each reduction in component size, a corresponding reduction in optimal operating voltages occurs. These decreases in operating voltages have required reductions in threshold voltages in order to maintain desired noise margins. Analog circuits, particularly analog-to-digital converters (ADCs) have suffered from this reduction, as they are typically designed with higher voltage transistors and operating voltages than are available to digital designers.
In a typical voltage mode ADC, the voltage being sampled is stored on a capacitor. It can be shown that the minimum size of the capacitor storing the voltage must be >kT/(Vn^2), where k is Boltzman's constant, T is temperature in Kelvin, and Vn is the size of the largest noise signal, usually less than ¼ of the ADC's least significant bit (LSB), that can be tolerated to give a low probability of error. As the operating voltage is reduced due to newer processes, the minimum capacitor size increases. This increases both the size of the circuit and the power used.
The accuracy of a voltage mode circuit, including a voltage mode ADC, is determined by the size of the capacitance used to store the voltage. The speed and power consumption of a voltage mode circuit is consequently affected by circuit capacitance and parasitic capacitance. The nodes of a voltage mode circuit must change voltage during operation of the circuit over a range that is often approximately the entire voltage range of the power supply voltage. Changing to a smaller geometry process increases parasitic capacitances, and due to the smaller voltage swing, larger circuit capacitances must be used, thereby requiring more power to compensate for the reduction in noise margins.
Throughout the drawings, identical reference numbers designate similar, but not necessarily identical, elements.